Building Balanced Search Tree based on Layered Decision Tree for Packet Classification

Packet classification is an important building block of the Internet routers for many network applications, such as Quality of Service (QoS), security, monitoring, analysis, and network intrusion detection (NIDS). In this paper, we propose a scheme called Layer based Search Tree (LST) to solve multifield packet classification problem. LST improves the traditional decision tree based schemes (e.g. HyperCuts and EffiCuts) by reconstructing the leaf nodes of the decision tree as an approximately balanced search tree. Since all the address subspace covered by each node of LST is disjoint, the buckets of the leaf and internal nodes in LST must not be empty. Thus, only the rules in one bucket can match the header values of the incoming packet. Searches on LST are completed immediately after the packet matches a rule in some internal node. In addition, we design the hardware search engine with pipeline and parallel architecture for the LST in Xilinx Virtex-5 FPGA environment. Because the memory usage of LST is very efficient, our search engine can support the ACL, FW, and IPC tables of 50k rules. LST search engine with dual ported memory can sustain the throughput of over 120 Gbps for the packets of minimum size (40 bytes). Keywordspacket classification; Pipelined Architecture; FPGA; decision tree;